1 files changed, 44 insertions, 44 deletions
diff --git a/src/core.rs b/src/core.rs
index 64a6a25..e646b46 100644
--- a/src/core.rs
+++ b/src/core.rs
@@ -37,11 +37,7 @@ impl Core {
     pub fn run(&mut self) {
         loop {
             if let Ok(cmd) = self.command_stream.try_recv() {
-                match cmd {
-                    CoreCmd::EnterDbgMode(DebugStream(dbg_stream)) => {
-                        let _ = self.debug_loop(dbg_stream);
-                    }
-                };
+                self.handle_command(cmd);
             }
 
             if let Err(e) = self.step() {
@@ -51,15 +47,45 @@ impl Core {
         }
     }
 
+    pub(crate) fn step(&mut self) -> Result<(), Exception> {
+        if !self.pc.is_multiple_of(4) {
+            self.throw_exception(Exception {
+                type_: ExceptionType::InstructionAddressMisaligned,
+                value: self.pc,
+            });
+        }
+
+        let instr = match self.mem.read_word(self.pc) {
+            Ok(i) => i,
+            Err(e) => {
+                return Err(e.to_exception_instr());
+            }
+        };
+
+        if instr & 3 != 3 {
+            // Compressed instruction - (currently) unsupported
+            // Could also be zero instruction, that also matches this
+            return Err(Exception {
+                type_: ExceptionType::IllegalInstruction,
+                value: instr as u64,
+            });
+        }
+
+        let instr = Instruction(instr);
+
+        if let Err(e) = find_and_exec(instr, self) {
+            dbg!(instr);
+            return Err(e);
+        }
+
+        Ok(())
+    }
+
     pub fn run_waiting_for_cmd(&mut self) {
         eprintln!("Waiting for any core command...");
         if let Ok(cmd) = self.command_stream.recv() {
             eprintln!("Recieved a command");
-            match cmd {
-                CoreCmd::EnterDbgMode(DebugStream(dbg_stream)) => {
-                    let _ = self.debug_loop(dbg_stream);
-                }
-            };
+            self.handle_command(cmd);
         } else {
             eprintln!("Error recieving command, starting anyway");
         }
@@ -69,6 +95,14 @@ impl Core {
         self.run();
     }
 
+    fn handle_command(&mut self, cmd: CoreCmd) {
+        match cmd {
+            CoreCmd::EnterDbgMode(DebugStream(dbg_stream)) => {
+                let _ = self.debug_loop(dbg_stream);
+            }
+        };
+    }
+
     fn debug_loop(&mut self, dbg_stream: mpsc::Receiver<gdb::DebugCommand>) -> anyhow::Result<()> {
         let mut breakpoints = HashSet::new();
 
@@ -137,40 +171,6 @@ impl Core {
         }
     }
 
-    pub(crate) fn step(&mut self) -> Result<(), Exception> {
-        if !self.pc.is_multiple_of(4) {
-            self.throw_exception(Exception {
-                type_: ExceptionType::InstructionAddressMisaligned,
-                value: self.pc,
-            });
-        }
-
-        let instr = match self.mem.read_word(self.pc) {
-            Ok(i) => i,
-            Err(e) => {
-                return Err(e.to_exception_instr());
-            }
-        };
-
-        if instr & 3 != 3 {
-            // Compressed instruction - (currently) unsupported
-            // Could also be zero instruction, that also matches this
-            return Err(Exception {
-                type_: ExceptionType::IllegalInstruction,
-                value: instr as u64,
-            });
-        }
-
-        let instr = Instruction(instr);
-
-        if let Err(e) = find_and_exec(instr, self) {
-            dbg!(instr);
-            return Err(e);
-        }
-
-        Ok(())
-    }
-
     fn throw_exception(&mut self, exception: Exception) {
         eprintln!("Exception: {exception:?}");
         dbg!(self.pc, self.x_regs);