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-rw-r--r--src/instructions/rvi.rs1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/instructions/rvi.rs b/src/instructions/rvi.rs
index 24d45a1..f82f1b3 100644
--- a/src/instructions/rvi.rs
+++ b/src/instructions/rvi.rs
@@ -29,6 +29,7 @@ fn addi(core: &mut Core, instr: Instruction) -> InstructionResult {
InstructionResult::Normal
}
+// TODO: Support misaligned memory access
fn sd(core: &mut Core, instr: Instruction) -> InstructionResult {
let addr = core.reg_read(instr.rs1()).wrapping_add(instr.imm_s());