From c6da147d505020fe5d7ca3b505d412d42cb599e3 Mon Sep 17 00:00:00 2001 From: taitep Date: Tue, 23 Dec 2025 09:51:53 +0100 Subject: Implement BLT --- src/instructions/rvi.rs | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) (limited to 'src/instructions/rvi.rs') diff --git a/src/instructions/rvi.rs b/src/instructions/rvi.rs index 7d57ce6..c5ddaaa 100644 --- a/src/instructions/rvi.rs +++ b/src/instructions/rvi.rs @@ -93,12 +93,19 @@ pub fn auipc(core: &mut Core, instr: Instruction) -> InstructionResult { pub fn jal(core: &mut Core, instr: Instruction) -> InstructionResult { core.reg_write(instr.rd(), core.pc.wrapping_add(4)); + eprintln!("set x{} to {:x}", instr.rd(), core.pc.wrapping_add(4)); core.pc = core.pc.wrapping_add(instr.imm_j()); InstructionResult::Normal } pub fn jalr(core: &mut Core, instr: Instruction) -> InstructionResult { core.reg_write(instr.rd(), core.pc.wrapping_add(4)); + eprintln!( + "origin: {:x}, reg: x{}={:x}", + core.pc, + instr.rs1(), + core.reg_read(instr.rs1()) + ); core.pc = core.reg_read(instr.rs1()).wrapping_add(instr.imm_i()); InstructionResult::Normal } @@ -123,6 +130,16 @@ pub fn bne(core: &mut Core, instr: Instruction) -> InstructionResult { InstructionResult::Normal } +pub fn blt(core: &mut Core, instr: Instruction) -> InstructionResult { + if (core.reg_read(instr.rs1()) as i64) < (core.reg_read(instr.rs2()) as i64) { + core.pc = core.pc.wrapping_add(instr.imm_b()); + } else { + core.advance_pc(); + } + + InstructionResult::Normal +} + pub fn bgeu(core: &mut Core, instr: Instruction) -> InstructionResult { if core.reg_read(instr.rs1()) >= core.reg_read(instr.rs2()) { core.pc = core.pc.wrapping_add(instr.imm_b()); -- cgit v1.2.3