(BIG CHANGE) memory handling has changed, MMIO is now a 2 level page table, misaligned access supported, addresses not internally split to page and offset immediately, all load/store instructions implemented. Might still have bugs

1 files changed, 1 insertions, 1 deletions

diff --git a/echo.S b/echo.S
index 7c29fec..337c26b 100644
--- a/echo.S
+++ b/echo.S
@@ -7,7 +7,7 @@
 .equ UART_TX_READY, 0b01
 
 _start:
-    li a0, 0x1000
+    li a0, 0x10000
 
 loop:
     lbu t0, UART_STATUS(a0)