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authortaitep <taitep@taitep.se>2025-12-31 13:16:32 +0100
committertaitep <taitep@taitep.se>2025-12-31 13:16:32 +0100
commit21a8479ce99f54012150cc948ed7e5bb066c61e0 (patch)
tree49c5e5fa8736f7990016e410f2714d6e1b0db8ee /src/basic_uart.rs
parent09fe12f5165d582c7b83537e38ef8e5d85716f8b (diff)
Make MMIO devices not have control of the address of exceptions
Diffstat (limited to 'src/basic_uart.rs')
-rw-r--r--src/basic_uart.rs16
1 files changed, 5 insertions, 11 deletions
diff --git a/src/basic_uart.rs b/src/basic_uart.rs
index 8317950..0e209ba 100644
--- a/src/basic_uart.rs
+++ b/src/basic_uart.rs
@@ -13,7 +13,7 @@ use std::time::Duration;
use nix::fcntl::fcntl;
use nix::fcntl::{FcntlArg, OFlag};
-use trve::exceptions::{MemoryException, MemoryExceptionType};
+use trve::exceptions::MemoryExceptionType;
use trve::mem::MemDeviceInterface;
/// byte 0: rx/tx
@@ -77,26 +77,20 @@ impl BasicUart {
}
impl MemDeviceInterface for BasicUart {
- fn write_byte(&self, addr: u64, value: u8) -> Result<(), MemoryException> {
+ fn write_byte(&self, addr: u64, value: u8) -> Result<(), MemoryExceptionType> {
match addr {
0 => {
self.write(value);
Ok(())
}
- _ => Err(MemoryException {
- type_: MemoryExceptionType::AccessFault,
- addr,
- }),
+ _ => Err(MemoryExceptionType::AccessFault),
}
}
- fn read_byte(&self, addr: u64) -> Result<u8, MemoryException> {
+ fn read_byte(&self, addr: u64) -> Result<u8, MemoryExceptionType> {
match addr {
0 => Ok(self.read()),
1 => Ok(1 | (self.can_read() as u8) << 1),
- _ => Err(MemoryException {
- type_: MemoryExceptionType::AccessFault,
- addr,
- }),
+ _ => Err(MemoryExceptionType::AccessFault),
}
}
}