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authortaitep <taitep@taitep.se>2026-01-13 16:46:53 +0100
committertaitep <taitep@taitep.se>2026-01-13 16:46:53 +0100
commit36e6ec10069fe84aa677ab9ea4446e7fa3332886 (patch)
tree4644a0d5ca01b6ded2f067a363f0f8aabd5f5902 /src/decode.rs
parentd3e8af85a601cc5b831f02beff4ac415c21f1e8d (diff)
Implement Zalrsc
Diffstat (limited to 'src/decode.rs')
-rw-r--r--src/decode.rs17
1 files changed, 17 insertions, 0 deletions
diff --git a/src/decode.rs b/src/decode.rs
index 480fdff..be0dbc3 100644
--- a/src/decode.rs
+++ b/src/decode.rs
@@ -4,6 +4,8 @@
// This file is part of TRVE (https://gitea.taitep.se/taitep/trve)
// See LICENSE file in the project root for full license text.
+use std::sync::atomic::Ordering;
+
const MASK_REGISTER: u32 = 0x1f;
#[derive(Clone, Copy)]
@@ -104,7 +106,22 @@ impl Instruction {
}
/// Mostly/only used for the SYSTEM opcode
+ #[inline]
pub fn funct12(self) -> u16 {
(self.0 >> 20) as u16
}
+
+ /// Looks at the aq/rl bits of atomic instructions and converts to an Ordering
+ #[inline]
+ pub fn amo_ordering(self) -> Ordering {
+ let aq = self.0 >> 26 & 1 != 0;
+ let rl = self.0 >> 25 & 1 != 0;
+
+ match (aq, rl) {
+ (false, false) => Ordering::Relaxed,
+ (false, true) => Ordering::Release,
+ (true, false) => Ordering::Acquire,
+ (true, true) => Ordering::AcqRel,
+ }
+ }
}