EXCEPTION SYSTEM (initial version - may change later)

1 files changed, 37 insertions, 40 deletions

diff --git a/src/instructions/rvi.rs b/src/instructions/rvi.rs
index 6766fdf..d8439fa 100644
--- a/src/instructions/rvi.rs
+++ b/src/instructions/rvi.rs
@@ -4,157 +4,154 @@
 // This file is part of TRVE (https://gitea.taitep.se/taitep/trve)
 // See LICENSE file in the project root for full license text.
 
-use crate::{
-    core::{Core, InstructionResult},
-    decode::Instruction,
-};
+use crate::{core::Core, decode::Instruction, exceptions::ExceptionType};
 
 mod mem;
 
 pub use mem::*;
 
-pub fn add(core: &mut Core, instr: Instruction) -> InstructionResult {
+pub fn add(core: &mut Core, instr: Instruction) -> Result<(), ExceptionType> {
     core.reg_write(
         instr.rd(),
         core.reg_read(instr.rs1())
             .wrapping_add(core.reg_read(instr.rs2())),
     );
     core.advance_pc();
-    InstructionResult::Normal
+    Ok(())
 }
 
-pub fn sub(core: &mut Core, instr: Instruction) -> InstructionResult {
+pub fn sub(core: &mut Core, instr: Instruction) -> Result<(), ExceptionType> {
     core.reg_write(
         instr.rd(),
         core.reg_read(instr.rs1())
             .wrapping_sub(core.reg_read(instr.rs2())),
     );
     core.advance_pc();
-    InstructionResult::Normal
+    Ok(())
 }
 
-pub fn addi(core: &mut Core, instr: Instruction) -> InstructionResult {
+pub fn addi(core: &mut Core, instr: Instruction) -> Result<(), ExceptionType> {
     core.reg_write(
         instr.rd(),
         core.reg_read(instr.rs1()).wrapping_add(instr.imm_i()),
     );
     core.advance_pc();
-    InstructionResult::Normal
+    Ok(())
 }
 
-pub fn addiw(core: &mut Core, instr: Instruction) -> InstructionResult {
+pub fn addiw(core: &mut Core, instr: Instruction) -> Result<(), ExceptionType> {
     let res = core.reg_read(instr.rs1()).wrapping_add(instr.imm_i()) as i32;
     core.reg_write(instr.rd(), res as i64 as u64);
     core.advance_pc();
-    InstructionResult::Normal
+    Ok(())
 }
 
-pub fn and(core: &mut Core, instr: Instruction) -> InstructionResult {
+pub fn and(core: &mut Core, instr: Instruction) -> Result<(), ExceptionType> {
     core.reg_write(
         instr.rd(),
         core.reg_read(instr.rs1()) & core.reg_read(instr.rs2()),
     );
     core.advance_pc();
-    InstructionResult::Normal
+    Ok(())
 }
 
-pub fn andi(core: &mut Core, instr: Instruction) -> InstructionResult {
+pub fn andi(core: &mut Core, instr: Instruction) -> Result<(), ExceptionType> {
     core.reg_write(instr.rd(), core.reg_read(instr.rs1()) & instr.imm_i());
     core.advance_pc();
-    InstructionResult::Normal
+    Ok(())
 }
 
-pub fn or(core: &mut Core, instr: Instruction) -> InstructionResult {
+pub fn or(core: &mut Core, instr: Instruction) -> Result<(), ExceptionType> {
     core.reg_write(
         instr.rd(),
         core.reg_read(instr.rs1()) | core.reg_read(instr.rs2()),
     );
     core.advance_pc();
-    InstructionResult::Normal
+    Ok(())
 }
 
-pub fn slli(core: &mut Core, instr: Instruction) -> InstructionResult {
+pub fn slli(core: &mut Core, instr: Instruction) -> Result<(), ExceptionType> {
     core.reg_write(instr.rd(), core.reg_read(instr.rs1()) << instr.imm_shamt());
     core.advance_pc();
-    InstructionResult::Normal
+    Ok(())
 }
 
-pub fn srli(core: &mut Core, instr: Instruction) -> InstructionResult {
+pub fn srli(core: &mut Core, instr: Instruction) -> Result<(), ExceptionType> {
     core.reg_write(instr.rd(), core.reg_read(instr.rs1()) >> instr.imm_shamt());
     core.advance_pc();
-    InstructionResult::Normal
+    Ok(())
 }
 
-pub fn lui(core: &mut Core, instr: Instruction) -> InstructionResult {
+pub fn lui(core: &mut Core, instr: Instruction) -> Result<(), ExceptionType> {
     core.reg_write(instr.rd(), instr.imm_u());
     core.advance_pc();
-    InstructionResult::Normal
+    Ok(())
 }
 
-pub fn auipc(core: &mut Core, instr: Instruction) -> InstructionResult {
+pub fn auipc(core: &mut Core, instr: Instruction) -> Result<(), ExceptionType> {
     core.reg_write(instr.rd(), core.pc.wrapping_add(instr.imm_u()));
     core.advance_pc();
-    InstructionResult::Normal
+    Ok(())
 }
 
-pub fn jal(core: &mut Core, instr: Instruction) -> InstructionResult {
+pub fn jal(core: &mut Core, instr: Instruction) -> Result<(), ExceptionType> {
     core.reg_write(instr.rd(), core.pc.wrapping_add(4));
     core.pc = core.pc.wrapping_add(instr.imm_j());
-    InstructionResult::Normal
+    Ok(())
 }
 
-pub fn jalr(core: &mut Core, instr: Instruction) -> InstructionResult {
+pub fn jalr(core: &mut Core, instr: Instruction) -> Result<(), ExceptionType> {
     core.reg_write(instr.rd(), core.pc.wrapping_add(4));
     core.pc = core.reg_read(instr.rs1()).wrapping_add(instr.imm_i());
-    InstructionResult::Normal
+    Ok(())
 }
 
-pub fn beq(core: &mut Core, instr: Instruction) -> InstructionResult {
+pub fn beq(core: &mut Core, instr: Instruction) -> Result<(), ExceptionType> {
     if core.reg_read(instr.rs1()) == core.reg_read(instr.rs2()) {
         core.pc = core.pc.wrapping_add(instr.imm_b());
     } else {
         core.advance_pc();
     }
 
-    InstructionResult::Normal
+    Ok(())
 }
 
-pub fn bne(core: &mut Core, instr: Instruction) -> InstructionResult {
+pub fn bne(core: &mut Core, instr: Instruction) -> Result<(), ExceptionType> {
     if core.reg_read(instr.rs1()) != core.reg_read(instr.rs2()) {
         core.pc = core.pc.wrapping_add(instr.imm_b());
     } else {
         core.advance_pc();
     }
 
-    InstructionResult::Normal
+    Ok(())
 }
 
-pub fn blt(core: &mut Core, instr: Instruction) -> InstructionResult {
+pub fn blt(core: &mut Core, instr: Instruction) -> Result<(), ExceptionType> {
     if (core.reg_read(instr.rs1()) as i64) < (core.reg_read(instr.rs2()) as i64) {
         core.pc = core.pc.wrapping_add(instr.imm_b());
     } else {
         core.advance_pc();
     }
 
-    InstructionResult::Normal
+    Ok(())
 }
 
-pub fn bgeu(core: &mut Core, instr: Instruction) -> InstructionResult {
+pub fn bgeu(core: &mut Core, instr: Instruction) -> Result<(), ExceptionType> {
     if core.reg_read(instr.rs1()) >= core.reg_read(instr.rs2()) {
         core.pc = core.pc.wrapping_add(instr.imm_b());
     } else {
         core.advance_pc();
     }
 
-    InstructionResult::Normal
+    Ok(())
 }
 
-pub fn bltu(core: &mut Core, instr: Instruction) -> InstructionResult {
+pub fn bltu(core: &mut Core, instr: Instruction) -> Result<(), ExceptionType> {
     if core.reg_read(instr.rs1()) < core.reg_read(instr.rs2()) {
         core.pc = core.pc.wrapping_add(instr.imm_b());
     } else {
         core.advance_pc();
     }
 
-    InstructionResult::Normal
+    Ok(())
 }