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authortaitep <taitep@taitep.se>2025-12-21 12:20:30 +0100
committertaitep <taitep@taitep.se>2025-12-21 12:20:30 +0100
commit23647ae9660189781b9ac452865f7c10f4cc9150 (patch)
treeb97f7cd47ebeebb4b72d17f65804f71783760e7e /src/instructions/rvi.rs
parentac9506a1a785495a8f5f299ca90f948cce28ecc7 (diff)
Add JAL and change some of the formatting on previous instructions to be cleaner
Diffstat (limited to 'src/instructions/rvi.rs')
-rw-r--r--src/instructions/rvi.rs14
1 files changed, 10 insertions, 4 deletions
diff --git a/src/instructions/rvi.rs b/src/instructions/rvi.rs
index feff85b..2d342df 100644
--- a/src/instructions/rvi.rs
+++ b/src/instructions/rvi.rs
@@ -11,7 +11,7 @@ use crate::{
mem::PageNum,
};
-pub(super) fn addi(core: &mut Core, instr: Instruction) -> InstructionResult {
+pub fn addi(core: &mut Core, instr: Instruction) -> InstructionResult {
core.reg_write(
instr.rd(),
core.reg_read(instr.rs1()).wrapping_add(instr.imm_i()),
@@ -22,7 +22,7 @@ pub(super) fn addi(core: &mut Core, instr: Instruction) -> InstructionResult {
InstructionResult::Normal
}
-pub(super) fn addiw(core: &mut Core, instr: Instruction) -> InstructionResult {
+pub fn addiw(core: &mut Core, instr: Instruction) -> InstructionResult {
let res = core.reg_read(instr.rs1()).wrapping_add(instr.imm_i()) as i32;
core.reg_write(instr.rd(), res as i64 as u64);
@@ -33,7 +33,7 @@ pub(super) fn addiw(core: &mut Core, instr: Instruction) -> InstructionResult {
}
// TODO: Support misaligned memory access
-pub(super) fn sd(core: &mut Core, instr: Instruction) -> InstructionResult {
+pub fn sd(core: &mut Core, instr: Instruction) -> InstructionResult {
let addr = core.reg_read(instr.rs1()).wrapping_add(instr.imm_s());
if !addr.is_multiple_of(std::mem::size_of::<DWord>() as Addr) {
@@ -53,8 +53,14 @@ pub(super) fn sd(core: &mut Core, instr: Instruction) -> InstructionResult {
}
}
-pub(super) fn lui(core: &mut Core, instr: Instruction) -> InstructionResult {
+pub fn lui(core: &mut Core, instr: Instruction) -> InstructionResult {
core.reg_write(instr.rd(), instr.imm_u());
core.pc = core.pc.wrapping_add(4);
InstructionResult::Normal
}
+
+pub fn jal(core: &mut Core, instr: Instruction) -> InstructionResult {
+ core.reg_write(instr.rd(), core.pc);
+ core.pc = core.pc.wrapping_add(instr.imm_j());
+ InstructionResult::Normal
+}