summaryrefslogtreecommitdiff
path: root/src/mem.rs
diff options
context:
space:
mode:
authortaitep <taitep@taitep.se>2025-12-28 12:01:39 +0100
committertaitep <taitep@taitep.se>2025-12-28 12:01:39 +0100
commit9a9bef7dd7dce7d5c10b7cf49a42478ad85829ac (patch)
treeea832693678899e97aecf12bd620f0123b6ce3d2 /src/mem.rs
parent8024af6b1348b5f47fabe5a1949de54607a33888 (diff)
Remove consts.rs and just use plain types
Diffstat (limited to 'src/mem.rs')
-rw-r--r--src/mem.rs93
1 files changed, 45 insertions, 48 deletions
diff --git a/src/mem.rs b/src/mem.rs
index 95a0eb2..e3cbe82 100644
--- a/src/mem.rs
+++ b/src/mem.rs
@@ -11,14 +11,11 @@ use std::sync::{
use memmap2::MmapMut;
-use crate::{
- consts::{Addr, Byte, DWord, HWord, Word},
- exceptions::{MemoryException, MemoryExceptionType},
-};
+use crate::exceptions::{MemoryException, MemoryExceptionType};
pub type PageNum = usize;
-pub const RAM_START: Addr = 0x8000_0000;
+pub const RAM_START: u64 = 0x8000_0000;
#[derive(Clone)]
pub struct MemConfig {
@@ -27,7 +24,7 @@ pub struct MemConfig {
}
impl MemConfig {
- pub fn memory_mapping_type(&self, addr: Addr) -> Option<MemoryMappingType> {
+ pub fn memory_mapping_type(&self, addr: u64) -> Option<MemoryMappingType> {
if addr >= RAM_START {
Some(MemoryMappingType::RAM)
} else {
@@ -37,7 +34,7 @@ impl MemConfig {
}
}
- pub fn read_dword(&self, addr: Addr) -> Result<DWord, MemoryException> {
+ pub fn read_dword(&self, addr: u64) -> Result<u64, MemoryException> {
if addr >= RAM_START {
self.ram.read_dword(addr - RAM_START)
} else {
@@ -55,7 +52,7 @@ impl MemConfig {
interface.read_dword(addr)
}
}
- pub fn read_word(&self, addr: Addr) -> Result<Word, MemoryException> {
+ pub fn read_word(&self, addr: u64) -> Result<u32, MemoryException> {
if addr >= RAM_START {
self.ram.read_word(addr - RAM_START)
} else {
@@ -73,7 +70,7 @@ impl MemConfig {
interface.read_word(addr)
}
}
- pub fn read_hword(&self, addr: Addr) -> Result<HWord, MemoryException> {
+ pub fn read_hword(&self, addr: u64) -> Result<u16, MemoryException> {
if addr >= RAM_START {
self.ram.read_hword(addr - RAM_START)
} else {
@@ -90,7 +87,7 @@ impl MemConfig {
interface.read_hword(addr)
}
}
- pub fn read_byte(&self, addr: Addr) -> Result<Byte, MemoryException> {
+ pub fn read_byte(&self, addr: u64) -> Result<u8, MemoryException> {
if addr >= RAM_START {
self.ram.read_byte(addr - RAM_START)
} else {
@@ -102,7 +99,7 @@ impl MemConfig {
}
}
- pub fn write_dword(&self, addr: Addr, value: DWord) -> Result<(), MemoryException> {
+ pub fn write_dword(&self, addr: u64, value: u64) -> Result<(), MemoryException> {
if addr >= RAM_START {
self.ram.write_dword(addr - RAM_START, value)
} else {
@@ -119,7 +116,7 @@ impl MemConfig {
interface.write_dword(addr, value)
}
}
- pub fn write_word(&self, addr: Addr, value: Word) -> Result<(), MemoryException> {
+ pub fn write_word(&self, addr: u64, value: u32) -> Result<(), MemoryException> {
if addr >= RAM_START {
self.ram.write_word(addr - RAM_START, value)
} else {
@@ -136,7 +133,7 @@ impl MemConfig {
interface.write_word(addr, value)
}
}
- pub fn write_hword(&self, addr: Addr, value: HWord) -> Result<(), MemoryException> {
+ pub fn write_hword(&self, addr: u64, value: u16) -> Result<(), MemoryException> {
if addr >= RAM_START {
self.ram.write_hword(addr - RAM_START, value)
} else {
@@ -153,7 +150,7 @@ impl MemConfig {
interface.write_hword(addr, value)
}
}
- pub fn write_byte(&self, addr: Addr, value: Byte) -> Result<(), MemoryException> {
+ pub fn write_byte(&self, addr: u64, value: u8) -> Result<(), MemoryException> {
if addr >= RAM_START {
self.ram.write_byte(addr - RAM_START, value)
} else {
@@ -165,7 +162,7 @@ impl MemConfig {
}
}
- pub fn get_atomic_dword(&self, addr: Addr) -> Result<&AtomicU64, MemoryException> {
+ pub fn get_atomic_dword(&self, addr: u64) -> Result<&AtomicU64, MemoryException> {
if !addr.is_multiple_of(8) {
return Err(MemoryException {
type_: MemoryExceptionType::AddressMisaligned,
@@ -184,7 +181,7 @@ impl MemConfig {
})
}
}
- pub fn get_atomic_word(&self, addr: Addr) -> Result<&AtomicU32, MemoryException> {
+ pub fn get_atomic_word(&self, addr: u64) -> Result<&AtomicU32, MemoryException> {
if !addr.is_multiple_of(4) {
return Err(MemoryException {
type_: MemoryExceptionType::AddressMisaligned,
@@ -262,14 +259,14 @@ impl Ram {
}
#[inline]
- pub fn read_dword(&self, addr: Addr) -> Result<DWord, MemoryException> {
+ pub fn read_dword(&self, addr: u64) -> Result<u64, MemoryException> {
if !addr.is_multiple_of(8) {
let high_word_addr = addr.wrapping_add(4);
let low_word = self.read_byte(addr)?;
let high_word = self.read_byte(high_word_addr)?;
- return Ok((low_word as DWord) | (high_word as DWord) << 32);
+ return Ok((low_word as u64) | (high_word as u64) << 32);
}
let index = (addr / 8) as usize;
@@ -284,14 +281,14 @@ impl Ram {
.load(Relaxed))
}
#[inline]
- pub fn read_word(&self, addr: Addr) -> Result<Word, MemoryException> {
+ pub fn read_word(&self, addr: u64) -> Result<u32, MemoryException> {
if !addr.is_multiple_of(4) {
let high_hword_addr = addr.wrapping_add(2);
let low_hword = self.read_hword(addr)?;
let high_hword = self.read_hword(high_hword_addr)?;
- return Ok((low_hword as Word) | (high_hword as Word) << 16);
+ return Ok((low_hword as u32) | (high_hword as u32) << 16);
}
let index = (addr / 4) as usize;
@@ -306,14 +303,14 @@ impl Ram {
.load(Relaxed))
}
#[inline]
- pub fn read_hword(&self, addr: Addr) -> Result<HWord, MemoryException> {
+ pub fn read_hword(&self, addr: u64) -> Result<u16, MemoryException> {
if !addr.is_multiple_of(2) {
let high_byte_addr = addr.wrapping_add(1);
let low_byte = self.read_byte(addr)?;
let high_byte = self.read_byte(high_byte_addr)?;
- return Ok((low_byte as HWord) | (high_byte as HWord) << 8);
+ return Ok((low_byte as u16) | (high_byte as u16) << 8);
}
let index = (addr / 2) as usize;
@@ -328,7 +325,7 @@ impl Ram {
.load(Relaxed))
}
#[inline]
- pub fn read_byte(&self, addr: Addr) -> Result<Byte, MemoryException> {
+ pub fn read_byte(&self, addr: u64) -> Result<u8, MemoryException> {
Ok(self
.buf_atomic()
.get(addr as usize)
@@ -340,10 +337,10 @@ impl Ram {
}
#[inline]
- pub fn write_dword(&self, addr: Addr, value: DWord) -> Result<(), MemoryException> {
+ pub fn write_dword(&self, addr: u64, value: u64) -> Result<(), MemoryException> {
if !addr.is_multiple_of(8) {
- let low_word = value as Word;
- let high_word = (value >> 32) as Word;
+ let low_word = value as u32;
+ let high_word = (value >> 32) as u32;
let high_word_address = addr.wrapping_add(4);
@@ -365,10 +362,10 @@ impl Ram {
Ok(())
}
#[inline]
- pub fn write_word(&self, addr: Addr, value: Word) -> Result<(), MemoryException> {
+ pub fn write_word(&self, addr: u64, value: u32) -> Result<(), MemoryException> {
if !addr.is_multiple_of(4) {
- let low_hword = value as HWord;
- let high_hword = (value >> 16) as HWord;
+ let low_hword = value as u16;
+ let high_hword = (value >> 16) as u16;
let high_hword_address = addr.wrapping_add(2);
@@ -390,10 +387,10 @@ impl Ram {
Ok(())
}
#[inline]
- pub fn write_hword(&self, addr: Addr, value: HWord) -> Result<(), MemoryException> {
+ pub fn write_hword(&self, addr: u64, value: u16) -> Result<(), MemoryException> {
if !addr.is_multiple_of(2) {
- let low_byte = value as Byte;
- let high_byte = (value >> 8) as Byte;
+ let low_byte = value as u8;
+ let high_byte = (value >> 8) as u8;
let high_byte_address = addr.wrapping_add(1);
@@ -415,7 +412,7 @@ impl Ram {
Ok(())
}
#[inline]
- pub fn write_byte(&self, addr: Addr, value: Byte) -> Result<(), MemoryException> {
+ pub fn write_byte(&self, addr: u64, value: u8) -> Result<(), MemoryException> {
self.buf_atomic()
.get(addr as usize)
.ok_or(MemoryException {
@@ -437,7 +434,7 @@ const MMIO_SECOND_LEVEL_ENTRIES: usize = MMIO_ROOT_PAGE_SIZE / MMIO_SECOND_LEVEL
pub struct MmioRoot(Box<[Option<MmioSecondLevel>; MMIO_ROOT_ENTRIES]>);
impl MmioRoot {
- pub fn insert(&mut self, base_addr: Addr, interface: Arc<dyn MemDeviceInterface>) {
+ pub fn insert(&mut self, base_addr: u64, interface: Arc<dyn MemDeviceInterface>) {
assert!(base_addr.is_multiple_of(MMIO_SECOND_LEVEL_PAGE_SIZE as u64));
assert!(base_addr < RAM_START);
@@ -452,7 +449,7 @@ impl MmioRoot {
}
}
- pub fn insert_full(&mut self, base_addr: Addr, interface: Arc<dyn MemDeviceInterface>) {
+ pub fn insert_full(&mut self, base_addr: u64, interface: Arc<dyn MemDeviceInterface>) {
assert!(base_addr.is_multiple_of(MMIO_ROOT_PAGE_SIZE as u64));
assert!(base_addr < RAM_START);
@@ -461,7 +458,7 @@ impl MmioRoot {
self.0[page_id] = Some(MmioSecondLevel::Interface(interface));
}
- fn get_device(&self, addr: Addr) -> Option<(Arc<dyn MemDeviceInterface>, Addr)> {
+ fn get_device(&self, addr: u64) -> Option<(Arc<dyn MemDeviceInterface>, u64)> {
debug_assert!(addr < RAM_START);
let page_id = addr as usize / MMIO_SECOND_LEVEL_PAGE_SIZE;
@@ -469,10 +466,10 @@ impl MmioRoot {
self.0[root_page_id]
.as_ref()
- .and_then(|s| s.get_device(addr % MMIO_ROOT_PAGE_SIZE as Addr))
+ .and_then(|s| s.get_device(addr % MMIO_ROOT_PAGE_SIZE as u64))
}
- fn crosses_boundary(&self, addr: Addr, size: Addr) -> bool {
+ fn crosses_boundary(&self, addr: u64, size: u64) -> bool {
if addr >= RAM_START {
return false;
}
@@ -514,12 +511,12 @@ enum MmioSecondLevel {
}
impl MmioSecondLevel {
- fn get_device(&self, addr: Addr) -> Option<(Arc<dyn MemDeviceInterface>, Addr)> {
+ fn get_device(&self, addr: u64) -> Option<(Arc<dyn MemDeviceInterface>, u64)> {
let page_id = addr as usize / MMIO_SECOND_LEVEL_PAGE_SIZE;
match self {
Self::SubTable(t) => t[page_id]
.as_ref()
- .map(|i| (i.clone(), addr % MMIO_SECOND_LEVEL_PAGE_SIZE as Addr)),
+ .map(|i| (i.clone(), addr % MMIO_SECOND_LEVEL_PAGE_SIZE as u64)),
Self::Interface(i) => Some((i.clone(), addr)),
}
@@ -534,50 +531,50 @@ impl Default for MmioSecondLevel {
#[allow(unused_variables)]
pub trait MemDeviceInterface {
- fn write_dword(&self, addr: Addr, value: DWord) -> Result<(), MemoryException> {
+ fn write_dword(&self, addr: u64, value: u64) -> Result<(), MemoryException> {
Err(MemoryException {
type_: MemoryExceptionType::AccessFault,
addr,
})
}
- fn write_word(&self, addr: Addr, value: Word) -> Result<(), MemoryException> {
+ fn write_word(&self, addr: u64, value: u32) -> Result<(), MemoryException> {
Err(MemoryException {
type_: MemoryExceptionType::AccessFault,
addr,
})
}
- fn write_hword(&self, addr: Addr, value: HWord) -> Result<(), MemoryException> {
+ fn write_hword(&self, addr: u64, value: u16) -> Result<(), MemoryException> {
Err(MemoryException {
type_: MemoryExceptionType::AccessFault,
addr,
})
}
- fn write_byte(&self, addr: Addr, value: Byte) -> Result<(), MemoryException> {
+ fn write_byte(&self, addr: u64, value: u8) -> Result<(), MemoryException> {
Err(MemoryException {
type_: MemoryExceptionType::AccessFault,
addr,
})
}
- fn read_dword(&self, addr: Addr) -> Result<DWord, MemoryException> {
+ fn read_dword(&self, addr: u64) -> Result<u64, MemoryException> {
Err(MemoryException {
type_: MemoryExceptionType::AccessFault,
addr,
})
}
- fn read_word(&self, addr: Addr) -> Result<Word, MemoryException> {
+ fn read_word(&self, addr: u64) -> Result<u32, MemoryException> {
Err(MemoryException {
type_: MemoryExceptionType::AccessFault,
addr,
})
}
- fn read_hword(&self, addr: Addr) -> Result<HWord, MemoryException> {
+ fn read_hword(&self, addr: u64) -> Result<u16, MemoryException> {
Err(MemoryException {
type_: MemoryExceptionType::AccessFault,
addr,
})
}
- fn read_byte(&self, addr: Addr) -> Result<Byte, MemoryException> {
+ fn read_byte(&self, addr: u64) -> Result<u8, MemoryException> {
Err(MemoryException {
type_: MemoryExceptionType::AccessFault,
addr,