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-rw-r--r--src/instructions.rs5
-rw-r--r--src/instructions/rvi.rs6
2 files changed, 11 insertions, 0 deletions
diff --git a/src/instructions.rs b/src/instructions.rs
index 8c9c910..e4d5b03 100644
--- a/src/instructions.rs
+++ b/src/instructions.rs
@@ -25,6 +25,11 @@ pub(crate) fn find_and_exec(instr: Instruction, core: &mut Core) -> Option<Instr
// OP_IMM
0b000 => Some(rvi::addi(core, instr)),
0b001 => (instr.funct6() == 0).then(|| rvi::slli(core, instr)),
+ 0b101 => match instr.funct6() {
+ // immediate right-shift
+ 0b000000 => Some(rvi::srli(core, instr)),
+ _ => None,
+ },
0b111 => Some(rvi::andi(core, instr)),
_ => None,
},
diff --git a/src/instructions/rvi.rs b/src/instructions/rvi.rs
index 7ca9acc..6766fdf 100644
--- a/src/instructions/rvi.rs
+++ b/src/instructions/rvi.rs
@@ -79,6 +79,12 @@ pub fn slli(core: &mut Core, instr: Instruction) -> InstructionResult {
InstructionResult::Normal
}
+pub fn srli(core: &mut Core, instr: Instruction) -> InstructionResult {
+ core.reg_write(instr.rd(), core.reg_read(instr.rs1()) >> instr.imm_shamt());
+ core.advance_pc();
+ InstructionResult::Normal
+}
+
pub fn lui(core: &mut Core, instr: Instruction) -> InstructionResult {
core.reg_write(instr.rd(), instr.imm_u());
core.advance_pc();