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Taitep's RISC-V Emulator
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2025-12-27
Add exception values (what will go in mtval/stval)
taitep
2025-12-27
Initial FENCE implementation
taitep
2025-12-27
Add checks to make sure that ram has a size that is a multiple of 8
taitep
2025-12-27
Relicense to BSD 2-Clause to align better with the RISC-V community
taitep
2025-12-27
Fix some warnings
taitep
2025-12-27
Implement a GDB stub and fix another huge issue in S-type immediate decoding
taitep
2025-12-26
Make execload respect the static ram start
taitep
2025-12-26
Make macros for R/I-type operations and use them to implement basically ↵
taitep
every single one i think
2025-12-26
Make branches macros and implement all of them
taitep
2025-12-26
(BIG CHANGE) memory handling has changed, MMIO is now a 2 level page table, ↵
taitep
misaligned access supported, addresses not internally split to page and offset immediately, all load/store instructions implemented. Might still have bugs
2025-12-24
Small refactor in exception handling in core.rs
taitep
2025-12-24
Update README to mention ELF support
taitep
2025-12-24
Add a default implementation for the memory device interface that just ↵
taitep
returns access faults
2025-12-24
EXCEPTION SYSTEM (initial version - may change later)
taitep
2025-12-24
some linker script updates to work even more properly for newlib i think
taitep
2025-12-23
remove unused imports in main.rs
taitep
2025-12-23
ADD ELF SUPPORT
taitep
2025-12-23
Add license headers to files missing them
taitep
2025-12-23
Comment out the unused 'Pause' instruction result
taitep
2025-12-23
Implement SRLI
taitep
2025-12-23
Implement SH
taitep
2025-12-23
Remove some debug messages i forgot
taitep
2025-12-23
Implement BLT
taitep
2025-12-23
Fix s-type immediate decoding
taitep
2025-12-23
Improve error messaging
taitep
2025-12-23
Remove an unused import in main.rs
taitep
2025-12-22
Implement LW
taitep
2025-12-22
Improve the debug messages when invalid instructions are found (again)
taitep
2025-12-22
Implement BLTU
taitep
2025-12-22
Implement LH
taitep
2025-12-22
Implement BGEU
taitep
2025-12-22
Improve the debug messages when invalid instructions are found
taitep
2025-12-22
Pull out memory access instructions from rvi.rs to their own file
taitep
2025-12-22
Implement SW
taitep
2025-12-22
Implement SUB
taitep
2025-12-22
Implement OR
taitep
2025-12-22
Implement AND and improve formatting and ordering in rvi.rs
taitep
2025-12-22
Implement ADD
taitep
2025-12-22
Fix page offset miscalculation in instruction fetch
taitep
2025-12-22
WHY WAS I USING S-TYPE IMMEDIATE IN LD (also add some more debugging info on ↵
taitep
an exception)
2025-12-21
Make echo.S compatible with the C-compatible linker script
taitep
2025-12-21
Improve UART by using nonblocking stdin
taitep
2025-12-21
Implement LD and BNE
taitep
2025-12-21
Fix memory size in link.ld
taitep
2025-12-21
Add some stuff to help with using C in link.ld
taitep
2025-12-21
Implement JALR, fix JAL, change how some stuff in instructions.rs is expressed
taitep
2025-12-21
Switch the current binary to use anyhow errors and add a proper argument ↵
taitep
number check
2025-12-21
Implement AUIPC
taitep
2025-12-21
Fix assembly syntax in echo program
taitep
2025-12-21
Allow other image file names through cli args, increase ram size, update readme
taitep
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