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AgeCommit message (Expand)Author
2025-12-28Remove consts.rs and just use plain typestaitep
2025-12-27Implement ECALL and EBREAK, the final RV64I instructions!taitep
2025-12-27Add exception values (what will go in mtval/stval)taitep
2025-12-27Initial FENCE implementationtaitep
2025-12-27Add checks to make sure that ram has a size that is a multiple of 8taitep
2025-12-27Relicense to BSD 2-Clause to align better with the RISC-V communitytaitep
2025-12-27Fix some warningstaitep
2025-12-27Implement a GDB stub and fix another huge issue in S-type immediate decodingtaitep
2025-12-26Make execload respect the static ram starttaitep
2025-12-26Make macros for R/I-type operations and use them to implement basically every...taitep
2025-12-26Make branches macros and implement all of themtaitep
2025-12-26(BIG CHANGE) memory handling has changed, MMIO is now a 2 level page table, m...taitep
2025-12-24Small refactor in exception handling in core.rstaitep
2025-12-24Update README to mention ELF supporttaitep
2025-12-24Add a default implementation for the memory device interface that just return...taitep
2025-12-24EXCEPTION SYSTEM (initial version - may change later)taitep
2025-12-24some linker script updates to work even more properly for newlib i thinktaitep
2025-12-23remove unused imports in main.rstaitep
2025-12-23ADD ELF SUPPORTtaitep
2025-12-23Add license headers to files missing themtaitep
2025-12-23Comment out the unused 'Pause' instruction resulttaitep
2025-12-23Implement SRLItaitep
2025-12-23Implement SHtaitep
2025-12-23Remove some debug messages i forgottaitep
2025-12-23Implement BLTtaitep
2025-12-23Fix s-type immediate decodingtaitep
2025-12-23Improve error messagingtaitep
2025-12-23Remove an unused import in main.rstaitep
2025-12-22Implement LWtaitep
2025-12-22Improve the debug messages when invalid instructions are found (again)taitep
2025-12-22Implement BLTUtaitep
2025-12-22Implement LHtaitep
2025-12-22Implement BGEUtaitep
2025-12-22Improve the debug messages when invalid instructions are foundtaitep
2025-12-22Pull out memory access instructions from rvi.rs to their own filetaitep
2025-12-22Implement SWtaitep
2025-12-22Implement SUBtaitep
2025-12-22Implement ORtaitep
2025-12-22Implement AND and improve formatting and ordering in rvi.rstaitep
2025-12-22Implement ADDtaitep
2025-12-22Fix page offset miscalculation in instruction fetchtaitep
2025-12-22WHY WAS I USING S-TYPE IMMEDIATE IN LD (also add some more debugging info on ...taitep
2025-12-21Make echo.S compatible with the C-compatible linker scripttaitep
2025-12-21Improve UART by using nonblocking stdintaitep
2025-12-21Implement LD and BNEtaitep
2025-12-21Fix memory size in link.ldtaitep
2025-12-21Add some stuff to help with using C in link.ldtaitep
2025-12-21Implement JALR, fix JAL, change how some stuff in instructions.rs is expressedtaitep
2025-12-21Switch the current binary to use anyhow errors and add a proper argument numb...taitep
2025-12-21Implement AUIPCtaitep
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