| Age | Commit message (Expand) | Author |
|---|---|---|
| 2025-12-21 | Implement AUIPC | taitep |
| 2025-12-21 | Implement ANDI and BEQ | taitep |
| 2025-12-21 | Make a dedicated function for advancing the PC by one instruction | taitep |
| 2025-12-21 | Implement LB and LBU | taitep |
| 2025-12-21 | Implement SB | taitep |
| 2025-12-21 | Fix sd address calculation | taitep |
| 2025-12-21 | Remove a debug print from SLLI | taitep |
| 2025-12-21 | Implement SLLI and fix sign extension of immediates for I-type and S-type ins... | taitep |
| 2025-12-21 | Add JAL and change some of the formatting on previous instructions to be cleaner | taitep |
| 2025-12-21 | (BIG CHANGE) Switch instruction identification/execution to use a plain match... | taitep |
| 2025-12-01 | Add license/copyright notices to top of each source file (where applicable) | taitep |
| 2025-10-21 | Add support for addiw and lui | taitep |
| 2025-10-14 | Add a todo | taitep |
| 2025-10-14 | Move funct3 values to rvi.rs instead of being in opcodes.rs | taitep |
| 2025-10-10 | some debugging stuff and SECOND OPCODE! | taitep |
| 2025-10-07 | FIRST INSTRUCTION WORKING | taitep |
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index : trve.git | |
| Taitep's RISC-V Emulator |
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