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Taitep's RISC-V Emulator
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Author
2025-12-21
Implement LB and LBU
taitep
2025-12-21
Make the UART not constantly flush output
taitep
2025-12-21
Add a basic UART (very much temporary, its performance is most likely horrible
taitep
2025-12-21
Implement SB
taitep
2025-12-21
Fix sd address calculation
taitep
2025-12-21
Remove a debug print from SLLI
taitep
2025-12-21
Implement SLLI and fix sign extension of immediates for I-type and S-type ↵
taitep
instructions
2025-12-21
Get rid of some useless warnings in main.rs
taitep
2025-12-21
Add decode functions for immediate shifts (funct6 and imm_shamt), make ↵
taitep
decode functions not use references, add inline hints to decode functions
2025-12-21
Add JAL and change some of the formatting on previous instructions to be cleaner
taitep
2025-12-21
(BIG CHANGE) Switch instruction identification/execution to use a plain ↵
taitep
match tree, should improve performance by quite a bit
2025-12-01
Add license/copyright notices to top of each source file (where applicable)
taitep
2025-11-18
rename to TRVE
taitep
2025-10-21
Add support for addiw and lui
taitep
2025-10-14
Add a todo
taitep
2025-10-14
Move funct3 values to rvi.rs instead of being in opcodes.rs
taitep
2025-10-10
some debugging stuff and SECOND OPCODE!
taitep
2025-10-09
Make fields of DeviceEntry public
taitep
2025-10-09
Make some constants and type aliases public
taitep
2025-10-07
FIRST INSTRUCTION WORKING
taitep
2025-10-07
Make sure unsupported/illegal instructions are caught
taitep
2025-10-07
Make fields and register access functions of Core accessible to the rest of ↵
taitep
the emulator
2025-10-07
Make fields of MemConfig public to allow creating one
taitep
2025-10-04
I guess its a working execution loop?
taitep
2025-10-03
Swap out execution status for instructions returning an InstructionResult
taitep
2025-09-30
Initial instruction execution code i guess
taitep
2025-09-28
Allow identification of the type of memory (ram or mmio) backing a specific page
taitep
2025-09-27
base core state & instruction decoder
taitep
2025-09-27
actually no NOW the memory interface is "done"
taitep
2025-09-27
Initial stuff and memory implementation
taitep