Improve exception dumps and general debug info, make the emulator capable of running the riscv ISA tests, and perform some general fixes i found while making it pass the tests for RV64I

1 files changed, 2 insertions, 2 deletions

diff --git a/src/mem.rs b/src/mem.rs
index e3cbe82..a3b087c 100644
--- a/src/mem.rs
+++ b/src/mem.rs
@@ -263,8 +263,8 @@ impl Ram {
         if !addr.is_multiple_of(8) {
             let high_word_addr = addr.wrapping_add(4);
 
-            let low_word = self.read_byte(addr)?;
-            let high_word = self.read_byte(high_word_addr)?;
+            let low_word = self.read_word(addr)?;
+            let high_word = self.read_word(high_word_addr)?;
 
             return Ok((low_word as u64) | (high_word as u64) << 32);
         }