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Taitep's RISC-V Emulator
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core.rs
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Author
2026-01-02
Apply some clippy-suggested fixes
taitep
2026-01-02
Switch from std::mpsc channels to crossbeam
taitep
2025-12-31
Make MMIO devices not have control of the address of exceptions
taitep
2025-12-31
Change some ordering in core.rs and deduplicate core command handling
taitep
2025-12-30
Improve exception dumps and general debug info, make the emulator capable of ...
taitep
2025-12-28
Remove consts.rs and just use plain types
taitep
2025-12-27
Add exception values (what will go in mtval/stval)
taitep
2025-12-27
Relicense to BSD 2-Clause to align better with the RISC-V community
taitep
2025-12-27
Fix some warnings
taitep
2025-12-27
Implement a GDB stub and fix another huge issue in S-type immediate decoding
taitep
2025-12-26
Make macros for R/I-type operations and use them to implement basically every...
taitep
2025-12-26
(BIG CHANGE) memory handling has changed, MMIO is now a 2 level page table, m...
taitep
2025-12-24
Small refactor in exception handling in core.rs
taitep
2025-12-24
EXCEPTION SYSTEM (initial version - may change later)
taitep
2025-12-23
Comment out the unused 'Pause' instruction result
taitep
2025-12-23
Improve error messaging
taitep
2025-12-22
Improve the debug messages when invalid instructions are found (again)
taitep
2025-12-22
Improve the debug messages when invalid instructions are found
taitep
2025-12-22
Fix page offset miscalculation in instruction fetch
taitep
2025-12-22
WHY WAS I USING S-TYPE IMMEDIATE IN LD (also add some more debugging info on ...
taitep
2025-12-21
Make a dedicated function for advancing the PC by one instruction
taitep
2025-12-21
(BIG CHANGE) Switch instruction identification/execution to use a plain match...
taitep
2025-12-01
Add license/copyright notices to top of each source file (where applicable)
taitep
2025-10-10
some debugging stuff and SECOND OPCODE!
taitep
2025-10-07
Make sure unsupported/illegal instructions are caught
taitep
2025-10-07
Make fields and register access functions of Core accessible to the rest of t...
taitep
2025-10-04
I guess its a working execution loop?
taitep
2025-10-03
Swap out execution status for instructions returning an InstructionResult
taitep
2025-09-27
base core state & instruction decoder
taitep