trve.git - Taitep's RISC-V Emulator

Age	Commit message (Expand)	Author
2026-01-13	Implement Zalrsc	taitep
2026-01-12	Add the files and decode logic for RVA	taitep
2025-12-30	Improve exception dumps and general debug info, make the emulator capable of ...	taitep
2025-12-28	Remove consts.rs and just use plain types	taitep
2025-12-27	Implement ECALL and EBREAK, the final RV64I instructions!	taitep
2025-12-27	Relicense to BSD 2-Clause to align better with the RISC-V community	taitep
2025-12-27	Implement a GDB stub and fix another huge issue in S-type immediate decoding	taitep
2025-12-26	Make macros for R/I-type operations and use them to implement basically every...	taitep
2025-12-23	Fix s-type immediate decoding	taitep
2025-12-21	Implement SLLI and fix sign extension of immediates for I-type and S-type ins...	taitep
2025-12-21	Add decode functions for immediate shifts (funct6 and imm_shamt), make decode...	taitep
2025-12-01	Add license/copyright notices to top of each source file (where applicable)	taitep
2025-10-07	Make sure unsupported/illegal instructions are caught	taitep
2025-10-04	I guess its a working execution loop?	taitep
2025-09-27	base core state & instruction decoder	taitep