| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2025-12-27 | Add exception values (what will go in mtval/stval) | taitep | |
| 2025-12-27 | Relicense to BSD 2-Clause to align better with the RISC-V community | taitep | |
| 2025-12-26 | (BIG CHANGE) memory handling has changed, MMIO is now a 2 level page table, ↵ | taitep | |
| misaligned access supported, addresses not internally split to page and offset immediately, all load/store instructions implemented. Might still have bugs | |||
| 2025-12-24 | EXCEPTION SYSTEM (initial version - may change later) | taitep | |
| 2025-12-23 | Add license headers to files missing them | taitep | |
| 2025-12-21 | Improve UART by using nonblocking stdin | taitep | |
| 2025-12-21 | Remove unused imports from the UART implementation | taitep | |
| 2025-12-21 | Make the UART not constantly flush output | taitep | |
| 2025-12-21 | Add a basic UART (very much temporary, its performance is most likely horrible | taitep | |
 |
index : trve.git | |
| Taitep's RISC-V Emulator |
| summaryrefslogtreecommitdiff |